Date of Award
12-2006
Degree Type
Thesis
Degree Name
M.S.
Degree Program
Engineering
Department
Electrical Engineering
Major Professor
Chen, Huimin
Second Advisor
Bourgeois, Edit
Third Advisor
Li, X. Rong
Fourth Advisor
Jilkov, V.
Abstract
In this thesis, a parallel architecture for Analog-to-Digital Converters (ADCs) is developed to increase the system dynamic range. The proposed architecture is a critical component for a Continuous Wave Stepped Frequency (CWSF) radar system. Existing Commercial Off-The-Shelf (COTS) components are inadequate to meet the demands of a high sample rate and a high dynamic range specification. The proposed parallel architecture meets the design criteria by extending the upper voltage limit of high sample rate converters. Extensive simulation study verifies that the desired high sample rate and increased resolution is achieved.
Recommended Citation
Sausse, Brandy, "A Parallel Architecture for Analog-to-Digital Conversion with Improved Dynamic Range" (2006). University of New Orleans Theses and Dissertations. 502.
https://scholarworks.uno.edu/td/502
Rights
The University of New Orleans and its agents retain the non-exclusive license to archive and make accessible this dissertation or thesis in whole or in part in all forms of media, now or hereafter known. The author retains all other ownership rights to the copyright of the thesis or dissertation.