Date of Award
Li, X. Rong
In this thesis, a parallel architecture for Analog-to-Digital Converters (ADCs) is developed to increase the system dynamic range. The proposed architecture is a critical component for a Continuous Wave Stepped Frequency (CWSF) radar system. Existing Commercial Off-The-Shelf (COTS) components are inadequate to meet the demands of a high sample rate and a high dynamic range specification. The proposed parallel architecture meets the design criteria by extending the upper voltage limit of high sample rate converters. Extensive simulation study verifies that the desired high sample rate and increased resolution is achieved.
Sausse, Brandy, "A Parallel Architecture for Analog-to-Digital Conversion with Improved Dynamic Range" (2006). University of New Orleans Theses and Dissertations. 502.