Date of Award

Summer 8-13-2014

Degree Type


Degree Name


Degree Program

Electrical Engineering


Electrical Engineering

Major Professor

Dr. Parviz Rastgoufard

Second Advisor

Dr. Ittiphong Leevongwat

Third Advisor

Dr. George Ioup


It is specifically important to focus on voltage stability analysis of the power system to avoid worst case scenarios such as voltage collapse. The purpose of this thesis is to identify methods for enhancing the steady-state voltage stability using FACTS devices and determining their impact on real and reactive power losses, improvement of bus voltage magnitude, and transmission line loadability. To achieve this, FACTS devices such as Static VAR Compensator (SVC), Static Synchronous Compensator (STATCOM), and Thyristor Controlled Series Capacitor (TCSC) are used in the test system as three separate test cases. The results obtained assist in drawing conclusions on the effectiveness of each FACTS devices at generator, load and swing buses, on lines between two load buses, and between a load bus and a generator bus, in terms of metrics such as voltage magnitude profile, PV curves, and active and reactive power losses.


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